The present invention relates to a rolled copper foil or electrolytic copper foil for an electronic circuit to be used for forming a circuit by etching, and to a method of forming an electronic circuit by using such rolled copper foil or electrolytic copper foil.
A copper foil for a printed circuit is being widely used in electronic devices and electrical equipment. This kind of copper foil for a printed circuit is generally bonded to a base material such as a synthetic resin board or a film with an adhesive or without using an adhesive under high temperature and pressure to produce a copper-clad laminate, a circuit is subsequently printed with the process steps of resist coating and exposure in order to form the intended circuit, etching treatment is further performed in order to remove any unwanted part of the copper foil, and the various elements are soldered thereto in order to form a printed circuit for electronic devices.
A copper foil that is used for such a printed circuit can be broadly classified as an electrolytic copper foil and a rolled copper foil depending on the production method, but both are used according to the type or quality demand of the printed circuit board.
These copper foils have a surface that is bonded to a resin base material and a non-bonding surface, and they are respectively subject to special surface treatment (treatment process). In addition, there are cases where both surfaces are provided with a function of bonding with the resin (double treatment process); for instance, such as with a copper foil that is used as the inner layer of a multi-layered printed wiring board.
An electrolytic copper foil is generally produced by electrodepositing copper on a rotating drum, and continuously peeling this to obtain a copper foil. At this point in the production process, the surface in contact with the rotating drum is a gloss surface, and the opposite surface has numerous asperities (rough surface). Nevertheless, even with this kind of rough surface, it is standard to adhere copper particles of approximately 0.2 to 3 μm in order to further improve the adhesiveness with the resin substrate.
Moreover, there are also cases of reinforcing the foregoing asperities and forming a thin plated layer thereon for preventing the falling of the copper particles. The foregoing series of steps is referred to as roughening treatment. This kind of roughening treatment is required not only for electrolytic copper foils, but also required for rolled copper foils, and similar roughening treatment is also performed for rolled copper foils.
The foregoing copper foils are used and subject to hot pressing process or Roll-to-Roll process to produce a copper-clad laminate. To cite hot pressing process as an example, this laminate is produced through the process steps of synthesizing epoxy resin, impregnating a paper base material with phenol resin and drying this to produce a prepreg, and subjecting the prepreg and the copper foil, which are combined, to heat pressure molding with a pressing machine. In addition to the above, there is a method of drying a polyimide precursor solution on the copper foil to solidify this onto the copper foil in order to form a polyimide resin layer on the copper foil.
With the copper-clad laminate produced as described above, a circuit is printed with the process steps of resist coating and exposure, and etching treatment is further performed to remove any unwanted part of the copper foil. However, when forming a circuit by etching, there is a problem in that the circuit does not have the intended circuit width.
This is because the copper portion of the copper foil circuit after etching is etched downward from the surface of the copper foil; that is, etched broader toward the resin layer (cause sagging). If large “sagging” occurs, the copper circuit will short in the vicinity of the resin substrate, and may become defective.
It is necessary to reduce such “sagging” as much as possible. Thus, in order to prevent defective etching such as etching broadened downward, attempts have been made to reduce the “sagging” by prolonging the etching time and increasing the etching process.
Nevertheless, in the foregoing case, if there is a portion that has already reached a predetermined width dimension, such portion will be additionally etched, and the circuit width of that copper foil portion will correspondingly become narrower, and the uniform line width (circuit width) that is intended in the circuit design cannot be obtained. In particular, there is a problem in that such portion (thinned portion) will generate heat and, in certain cases, become disconnected.
Under circumstances where the patterns of electronic circuits are becoming finer, problems caused by this kind of defective etching are still often encountered today, and are becoming major issues in forming circuits.
In order to overcome the foregoing problems, the present inventors proposed a copper foil in which a metal or alloy layer to be etched slower than copper was formed on the copper foil on the etching side (refer to Patent Document 1). As the metal or alloy in this case, used are nickel, cobalt and their alloys.
Upon designing a circuit, since the etching solution will infiltrate from the resist coated side, namely, from the surface of the copper foil, if there is a metal or alloy layer with a slow etching rate immediately below the resist, the etching of the portion of the copper foil in the vicinity thereof is inhibited, and the etching of the other portions of the copper foil will advance. Thus, it was possible to yield the effect of reducing the “sagging” and forming a circuit with a uniform line width. Consequently, there was a vast improvement in comparison to the conventional technology.
Here, some problems arose at the stage of making further improvements. Specifically, after forming the circuit, it was necessary to remove the resin and also necessary to remove the metal or alloy layer with a slow etching rate, which was formed for preventing the “sagging”, by soft etching. In addition, it was also necessary to perform high-temperature treatment to the copper foil in the steps such that the resin is attached during the process of forming an electronic circuit with the use of a copper foil having a metal or alloy layer (nickel or nickel alloy layer) with a slow etching rate as a copper-clad laminate.
With respect to the former, in order to shorten the time required for the etching and removal process and achieve a clean removal, it is necessary to make the thickness of the nickel or nickel alloy layer as thin as possible. With respect to the latter, since it is exposed to heat, the nickel or nickel alloy layer is oxidized (commonly called “YAKE (oxidation)” since tarnish occurs), and there are problems in that the etching properties may deteriorate in the pattern etching, and defects such as short circuits or deterioration in the controllability of the circuit width may occur due to the deterioration in the resist coating properties (uniformity, adhesion) or the excessive etching of the interfacial oxide during the etching process. Thus, it is demanded that additional improvements be made, or different materials be used as a substitute therefor.
Here, there are several inventions that if the copper foil is to be exposed to heat, a zinc or zinc alloy or the like is formed on a gloss surface of the copper foil for a printed circuit for inhibiting the thermal oxidation resistance. For example, these would be Patent Document 2, Patent Document 3, Patent Document 4, Patent Document 5, Patent Document 6, and Patent Document 7. Moreover, also proposed is a method of covering the side to be bonded with the resin, or the side not to be etched, with nickel or nickel alloy.
Nevertheless, since these technologies were not proposed to prevent or inhibit the etching portion of the copper foil from being etched broader from the surface of the copper foil downward (occurrence of sagging) upon designing a copper foil circuit through etching, they are unable to resolve the foregoing problems.    Patent Document 1: Japanese Laid-Open Patent Publication No. 2002-176242    Patent Document 2: Japanese Laid-Open Patent Publication No. H5-140765    Patent Document 3: Japanese Laid-Open Patent Publication No. H6-85416    Patent Document 4: Japanese Laid-Open Patent Publication No. H6-85417    Patent Document 5: Japanese Laid-Open Patent Publication No. H6-280047    Patent Document 6: Japanese Laid-Open Patent Publication No. H7-74464    Patent Document 7: Japanese Laid-Open Patent Publication No. H7-278883    Patent Document 8: Japanese Laid-Open Patent Publication No. 2005-15861    Patent Document 9: Japanese Laid-Open Patent Publication No. 2006-261270